Intermediate Topic 26 of 51 Computer Architecture & Logic
Cache Memory
Small fast memory holding recently used data close to the CPU.
How it works
A cache is a small, fast memory that keeps copies of recently or frequently used data from slower memory. Data moves in fixed-size lines, typically 64 bytes, so nearby addresses come along. A hit returns data quickly, while a miss fetches it from the next level, and the hit rate and miss penalty determine average memory access time. Write policies include write-through and write-back.
Step-by-step walkthrough
- The CPU requests address 100.
- The cache has no copy, a miss.
- The cache fetches a whole line from memory.
- The line returns and is stored.
- The data goes to the CPU, and the next access to nearby data is a fast hit.
Where it is used
CPU caches, web browsers, content delivery networks, DNS resolvers and database buffers all use the same idea. Cache-friendly code keeps data compact and accessed sequentially.
Common pitfall
Misses come in types: compulsory, capacity and conflict. Poor data layout, pointer chasing and false sharing between threads degrade performance. Stale data is a danger in multicore and distributed caches, requiring coherence or invalidation. Do not assume the cache will fix algorithms with bad access patterns.
Where it fits in the course
Cache Memory is topic 26 of 51 in Computer Architecture & Logic, rated Intermediate. It follows Memory Hierarchy. The next topic is Cache Mapping.
Practice and explore
- Open the interactive lesson, with a mini quiz.
- Take the Computer Architecture & Logic quiz.
How to study this topic
- Read the explanation above and restate the definition in your own words.
- Open the interactive lesson and answer its mini quiz.
- Read the common pitfall, then write a short example that avoids it.
- Check your understanding in the Computer Architecture & Logic quiz, and revisit the topic if you miss a question.
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Related topics
- Memory Hierarchy (Computer Architecture & Logic)
- Cache Mapping (Computer Architecture & Logic)
- Addressing Modes (Computer Architecture & Logic)
- Cache Replacement Policies (Computer Architecture & Logic)
- Manual Memory Management (Languages & Compilers)
- Memory Barriers (Concurrency & Parallelism)
- Memory Constraints (Mobile, Embedded & IoT)